Input and output buffer including a dynamic driver reference generator
US8044684B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 21, 2010 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jul 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system having an input and output buffer includes a dynamic driver reference generator to generate dynamic driver reference signals based on a data signal and an IO buffer supply voltage, a level shifter to generate level shifted signals based, in part, on the dynamic driver reference signals, and a driver having at least one stress transistor. The driver dynamically adjusts a voltage across the stress transistor based on at least one of dynamic driver reference signals, the level shifted signals, and a current state of an IO pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.