Fused multiply-add rounding and unfused multiply-add rounding in a single multiply-add module
US8046399B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2008 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jul 23, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5443
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer processor including a single fused-unfused floating point multiply-add (FMA) module computes the result of the operation A*B+C for floating point numbers for fused multiply-add rounding operations and unfused multiply-add rounding operations. In one embodiment, a fused multiply-add rounding implementation is augmented with additional hardware which calculates an unfused multiply-add rounding result without adding additional pipeline stages. In one embodiment, a computation by the fused-unfused floating point multiply-add (FMA) module is initiated using a single opcode which determines whether a fused multiply-add rounding result or unfused multiply-add rounding result is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.