Patent · US Active

Data writing method for flash memory, and flash memory controller and storage device thereof

US8046528B2 · kind B2 · utility

17Cited by
1References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 12, 2008
Grant dateOct 25, 2011
Priority date
Expiry dateSep 25, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7203
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A data writing method for a block of a multi level cell NAND flash memory including upper page addresses and lower page addresses is provided, wherein a writing speed at the lower page addresses is higher than that at the upper page addresses. The data writing method includes receiving a writing command and determining whether an address to be written with new data in the writing command is the upper page address of the block. The method also includes copying old data previously recorded on the lower page addresses of the block as an old data backup when the address to be written in the writing command is the upper page address of the block and then writing the new data to the address to be written. Thus, old data may be protected while writing data to the upper page address of the multi level cell NAND flash memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.