System-on-a-chip (SoC) security using one-time programmable memories
US8046571B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2007 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jul 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/84
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus having corresponding methods and computer programs comprise: a processor; a test interface that is in communication with the processor only when the test interface is enabled; a first one-time-programmable (OTP) memory; and a non-volatile memory to store boot code for the processor, wherein when the processor is booted, the boot code causes the processor to test the first OTP memory; wherein the boot code causes the processor to enable the test interface when the first OTP memory has not been programmed; and wherein the boot code causes the processor to disable the test interface when the first OTP memory has been programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.