Method and system to emulate an M-bit instruction set
US8046748B2 · kind B2 · utility
2Cited by
21References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2005 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | May 11, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system to emulate an M-bit instruction set. At least some of the illustrative embodiments are a method comprising fetching at least a portion of an instruction (the instruction from a first instruction set that is not directly executable by a processor), indexing into a table to an index location (the index location based on the at least a portion of the instruction), executing a first series of instructions directly executable by the processor (the first series of instructions pointed to by the table at the index location), and thereby emulating execution of the instruction from the first instruction set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.