Integrated circuit on high performance chip
US8048766B2 · kind B2 · utility
86Cited by
192References
28Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 23, 2004 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Jul 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a die containing an integrated circuit, including active components and passive components, includes producing a first substrate containing at least one active component of active components and a second substrate containing critical components of the passive components, such as perovskites or MEMS, and bonding the two substrates by a layer transfer. The method provides an improved monolithic integration of devices such as MEMS with transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.