Wafer-level chip scale packaging for LED comprising carrier substrate with thermally conductive through holes and fill channels

US8049330B2 · kind B2 · utility

Assignee

• Industrial Technology Research Institute · TW

Inventors

• Ra-Min Tain · Hengshan, TW
• Wei-Chung Lo · Taipei, TW
• Li Shen · Hsinchu, TW

Key dates

• Filing date: Nov 23, 2005
• Grant date: Nov 1, 2011
• Expiry date: Aug 3, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10H20/8581

Abstract

A structure of light emitting diode (LED) wafer-level chip scale packaging (WL-CSP) is disclosed. The process of making the same is also provided in this invention. The LED CSP utilizes the through hole metal filling to enhance heat conduction between the LED die and its carrier substrate. The CSP structure is achieved by bonding pre-processed through-hole-filling carrier substrate against the flip-chip LED wafer.