Digital trimming of SAR ADCs
US8049654B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2010 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Feb 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Successive approximation register (SAR) analog-to-digital converters (ADCs) generally employ capacitive digital-to-analog converters (CDACs) to perform data conversions. In these CDACs, matching of capacitive values is important, and for conventional high resolution SAR ADCs, complex trimming or calibration procedures can be too costly. Here, however, a SAR ADC is provided that performs error correction so as to reduce the overall cost compared to conventional SAR ADCs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.