Non-volatile memory device including block state confirmation cell and method of operating the same
US8050087B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2008 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Jun 4, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5646
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.