Memory cell write
US8050116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2009 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | May 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of a memory cell comprising a voltage module configured to supply a first supply voltage and a second supply voltage, a data node programming module configured to receive the first supply voltage and to program a data node based at least in part on a write data line, and a complementary data node programming module configured to receive the second supply voltage and to program a complementary data node based at least in part on a complementary write data line, wherein the voltage module is configured such that the first supply voltage is substantially different from the second supply voltage for a period of time while the memory device is being programmed. Additional variants and embodiments may also be disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.