Single chip low power fully integrated 802.15.4 radio platform
US8050313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2007 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Aug 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70709
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A single chip radio platform is disclosed for communicating with an RF channel. An RF front end is provided having a receive/transmit capability to receive an RF carrier modulated with digital data and convert the data to analog baseband data, and modulate an RF carrier with baseband data. A digital signal processor (DSP) engine is provided for interfacing with the RF front end to form in conjunction therewith the PHY layer, and interfacing with the MAC layer to demodulate the baseband data and in the transmit mode to generate the baseband data for modulation and transmission by the RF front end. A microcontroller unit (MCU) is provided for performing the functionality of the MAC, network and application layers and interfacing with the DSP. Clock circuitry is provided including a stable reference clock for generating a first fixed clock for providing MCU clocks for the operation of the MCU, and for providing a reference for a local oscillator at substantially the channel frequency for use by the RF front end and a DSP clock for use by the DSP, both the MCU clocks, the local oscillator and the DSP clock having the stability of the first fixed clock. Periodic power management circuit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.