Data transfer device of serializer/deserializer system
US8050333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2007 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Jul 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0288
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a data transfer device which cancells an offset of a differential amplifier for amplifying a received signal and an offset caused by characteristics of a differential transmission line and selects optimum conditions such as pre-emphasis amount of an output pre-emphasis circuit, a first chip (transmission side LSI=transfer engine 210) and a second chip (reception side LSI=multiplexing engine 330) are connected to each other through differential transmission line 430 and a SerDes (serializer) 401 and a SerDes (deserializer) 402 are used to make signal transmission, so that optimum setting conditions of an offset amount of an offset cancellation circuit included in an input buffer amplifier and a pre-emphasis amount of pre-emphasis circuit included in an output buffer are decided in training using a training PRBS generator 560 and a training PRBS comparator 570.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.