System and method for managing memory using multi-state buffer representations
US8051223B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2008 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Feb 28, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0837
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, buffer constructs may be generated to be associated with any one of multiple mutually exclusive states, including an open state and a closed state. When the buffer construct is in the closed state, the region of memory represented by the buffer construct is made accessible to one or more direct memory access (DMA) operations. Upon completion of the one or more DMA operations, the buffer construct transitions from the closed state to the open state. The region of memory represented by the buffer construct is made accessible for use with one or more cache operations when the buffer construct is in the open state, so that the one or more cache operations are not in conflict with the one or more DMA operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.