Automatic memory management (AMM)
US8051266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2007 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Mar 24, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0269
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention manages the execution of multiple AMM cycles to reduce or eliminate any overlap. Specifically, the present invention provides an external supervisory process to monitor the AMM behavior of VMs on one or more nodes, and intervene when coincident AMM activity appears to be imminent. If AMM patterns suggest that two VMs are likely to perform a (e.g., a major) AMM cycle simultaneously (or with significant overlap) in the near future, the supervisory process can trigger one of the VMs to AMM immediately, or at the first ‘safe’ interval prior to the predicted AMM collision. This will have the effect of desynchronizing the AMM behavior of the VMs and maintaining AMM latency for both VMs within the expected bounds for their independent operation, without any inter-VM effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.