Patent · US Active

Serial ATA (SATA) power optimization through automatic deeper power state transition

US8051314B2 · kind B2 · utility

9Cited by

17References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Amber D. Huffman · Banks, US
Eng Hun Ooi · Bukit Mertajam, MY

Key dates

Filing date	Jun 25, 2008
Grant date	Nov 1, 2011
Priority date	—
Expiry date	Mar 31, 2030

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.