Method and system for forming conductive bumping with copper interconnection
US8053907B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2008 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Jul 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15788
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit system with one or more copper interconnects is provided. The one or more copper interconnects are in conductive contact with a substrate. The integrated circuit system includes a first dielectric layer, a copper material filling a first via through the first dielectric layer, a second dielectric layer in contact with the first dielectric layer, and a diffusion barrier layer. The diffusion barrier layer at least partially fills a second via through the second dielectric layer. At least a first part of the diffusion barrier layer is in direct contact with the copper material, and at least a second part of the diffusion barrier layer is in direct contact with the second dielectric layer. The integrated circuit system further includes a gold material at least partially filling the second via. The gold material is conductively connected with the copper material through the diffusion barrier layer and conductively connected with a substrate. Additionally, a method for making such an integrated circuit system with one or more copper interconnects is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.