Display substrate with dual transistor and connection transistor, method of manufacturing the display substrate and display device having the display substrate
US8054396B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2009 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Jan 29, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A display substrate includes a gate line, a data line, a pixel electrode, a storage line, a dual transistor, a connection transistor, a voltage-decreasing electrode, a first contact electrode and a second contact electrode. The voltage-decreasing electrode is disposed on the storage line. The voltage-decreasing electrode is connected to a connection drain electrode of the connection transistor. The first contact electrode overlaps with the first pixel part and is electrically connected to the first pixel part. The first contact electrode is connected to a first drain electrode of the dual transistor and a connection source electrode of the connection transistor. The second contact electrode overlaps with the second pixel part and is electrically connected to the second pixel part. The second contact electrode is connected to a second drain electrode of the dual transistor. Therefore, the aperture ratio of the display device may be increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.