Task queuing methods and systems for transmitting frame information over an I/O interface
US8054857B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 2004 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Jun 4, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data-processing systems and methods are disclosed, including an I/O interface for managing the transfer of data between a processor and at least one memory. A processor can be associated with the I/O interface, such that the processor generically assembles a first or prior frame from among a plurality of frames, transmits the first or prior frame from among the plurality of frames over the I/O interface and thereafter processes and assembles a subsequent or second frame from among the plurality of frames while the first frame is transmitting, thereby providing enhanced flexibility and speed for the assembly and transmission of the plurality of frames across the I/O interface. The methods and systems disclosed also permit processor (i.e., software control) flexibility in managing the overall order and priority of frame transmission and protocol management, while enhancing hardware performance with respect to the sending of frames and control sequences without requiring real time interaction from the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.