Method for planarization of wafer and method for formation of isolation structure in top metal layer

US8058175B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Herb He Huang · Shanghai, CN
• Xianyong Pu · Shanghai, CN
• Yi'nan Han · Shanghai, CN
• Yiqun Chen · Shanghai, CN

Key dates

• Filing date: Sep 10, 2007
• Grant date: Nov 15, 2011
• Expiry date: Oct 12, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G02F2201/48
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

The invention discloses a planarization method for a wafer having a surface layer with a recess, comprises: forming an etching-resist layer on the surface layer to fill the entire recess; etching the etching-resist layer and the surface layer, till the surface layer outside the recess is flush to or lower than the bottom of the recess, the etching speed of the surface layer being higher than that of the etching-resist layer; removing the etching-resist layer; and etching the surface layer to a predetermined depth. The method can avoid concentric ring recesses on the surface of the wafer resulted from a chemical mechanical polishing (CMP) process in the prior art, and can be used to obtain a wafer surface suitable for optical applications.