Reference voltage regulator for eDRAM with VSS-sensing
US8059475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2010 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Jun 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level includes an oscillator, a control block, a reference generator, a comparator, a pulse generator, a driver, and a reference voltage output, where the oscillator sends requests for sampling and correction to the control block between accesses of the eDRAM, the control block sends a pulse defining a time interval during which sampling and correction occurs to the pulse generator, the reference generator provides the reference level for comparison by the comparator with a sampling of the reference voltage output, the comparator decides if the reference voltage output requires correction and sends a correction request to the pulse generator if necessary, the pulse generator produces a correction pulse for the driver according to the correction request from the comparator, and the driver adjusts the reference voltage output during the correction pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.