Low power digital design for deep submicron technology
US8060204B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2009 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Sep 17, 2029 |
Classification
- Technology area (CPC A)Human Necessities
- CPC primaryA61N1/37
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
An apparatus comprises an implantable medical device that includes a storage circuit. The storage circuit includes a first stage circuit configured to receive an input signal and to invert and store information about a data bit received in the input signal, a second stage circuit coupled to the output of the first stage circuit to invert and store information about a data bit received from the first stage circuit, and an error circuit coupled to the output of the first stage circuit and an output of the second stage circuit. The error circuit generates an error indication when the storage circuit outputs match while the first stage circuit and the second stage circuit are in an inactive state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.