Power estimation based on block activity
US8060765B1 · kind B1 · utility
25Cited by
10References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 2, 2006 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Oct 1, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power monitor for electronic devices, such as computer chips, is used to estimate the power consumption and to compare the estimated power consumption against the power budget. The estimated power consumption is based on activity signals from various functional blocks of the computer chip. The activity signals that are monitored correlate accurately to the total number of flip-flops that are active at a given time. If the estimated power consumption exceeds the power budget, the speed of the clock signals supplied to the computer chip is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.