Vertical-type semiconductor devices
US8063438B2 · kind B2 · utility
20Cited by
1References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2009 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | Dec 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/23
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.