Semiconductor strain gauge and the manufacturing method
US8063457B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 12, 2009 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | May 11, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01L1/2293
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A high-density impurity diffused layer of an identical conduction type to the semiconductor substrate on which the impurity is doped higher in density than the semiconductor substrate around the diffuse resistance region is provided, one side of the electrodes is formed extending to the high-density impurity diffused layer and the diffused resistance region and the high-density impurity diffused layer are connected in a semiconductor strain gauge that is formed on the surface of the semiconductor substrate of a fixed conduction type and is provided with the diffused resistance region of opposite conduction type to the semiconductor substrate and is provided with electrodes on both ends of the diffused resistance region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.