Memory circuit with quantum well-type carrier storage

US8064239B2 · kind B2 · utility

Assignee

• The Board of Trustees of the Leland Stanford Junior University · US

Inventors

• Mehmet Günhan Ertosun · Stanford, US
• Krishna C. Saraswat · Saratoga, US
• Pawan Kapur · Palo Alto, US

Key dates

• Filing date: Nov 12, 2009
• Grant date: Nov 22, 2011
• Expiry date: Jan 10, 2030

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2211/4016
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.