Patent · US Active

Method and apparatus for an integrated circuit with programmable memory cells, data system

US8064243B2 · kind B2 · utility

0Cited by

13References

22Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Milena Ivanov · Unterhaching, DE
Heinz Hoenigschmid · Starnberg, DE
Stefan Dietrich · Potsdam, DE

Key dates

Filing date	Nov 13, 2007
Grant date	Nov 22, 2011
Priority date	—
Expiry date	Dec 28, 2029

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10S977/754
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and apparatus for an integrated circuit with programmable memory cells which are arranged between a first and a second conductor for supplying first and second voltage is provided. A control circuit is arranged between the memory cells and the second conductor. The control circuit controls a change time during which at least one of the memory cells is supplied with a changing current from the second supply changing a state of the memory cell. The control circuit senses the state of the memory cell and stops the erasing current when the memory cell is in a changed state. Furthermore an embodiment refers to a data system with a programmable memory and a method of operating an integrated circuit. Another embodiment refers to a method of operating an integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.