Patent · US Active

Architecture of a nvDRAM array and its sense regime

US8064255B2 · kind B2 · utility

0Cited by

143References

14Claims

0Family size

Assignee

Cypress Semiconductor Corporation · US

Inventors

Andreas Scade · Dresden, DE
Stefan Guenther · Lake Orion, US

Key dates

Filing date	Dec 31, 2007
Grant date	Nov 22, 2011
Priority date	—
Expiry date	Mar 5, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C14/0018
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.