Embedded memory protection
US8065512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2006 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | Jul 20, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present application includes a microcontroller (30) that has an embedded memory (46), a programmable processor (32), and a test interface (34). The memory (46) is accessible through the test interface (34). In response to resetting this microcontroller (30), a counter is started and the test interface (34) is initially set to a disabled state while an initiation program is executed. The test interface (34) is changed to an enabled state—such that access to the embedded memory (46) is permitted through it—when the counter reaches a predefined value unless the microcontroller (30) executes programming code before the predefined value is reached to provide the disabled state during subsequent microcontroller (30) operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.