Semiconductor device fabricating method
US8067283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2009 |
| Grant date | Nov 29, 2011 |
| Priority date | — |
| Expiry date | Nov 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0144
Abstract
A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer and the second gate insulating layer are removed to form a first gate, a remaining first gate insulating layer, a second gate and a remaining second gate insulating layer. The remaining first gate insulating layer not covered by the first gate has a first thickness, and the remaining second gate insulating layer not covered by the second gate has a second thickness, wherein a ratio between the first thickness and the second thickness is about 10 to 20. A pair of first spacers and a pair of second spacers are formed on sidewalls of the first gate and the second gate, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.