Systems and methods for performing a program-verify process on a nonvolatile memory by selectively pre-charging bit lines associated with memory cells during the verify operations
US8068361B2 · kind B2 · utility
8Cited by
2References
18Claims
0Family size
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Key dates
| Filing date | Jul 31, 2009 |
| Grant date | Nov 29, 2011 |
| Priority date | — |
| Expiry date | Feb 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory system is operated by performing a program loop on each of a plurality of memory cells, each program loop comprising at least one program-verify operation and selectively pre-charging bit lines associated with each of the plurality of memory cells during the at least one program-verify operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.