Equalization techniques using viterbi algorithms in software-defined radio systems
US8069401B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2007 |
| Grant date | Nov 29, 2011 |
| Priority date | — |
| Expiry date | Sep 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0003
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for channel equalization using a Viterbi algorithm. Information from an output of a matched filter and channel parameters from a channel estimation circuit are correlated and passed on to a reconfigurable data path. The reconfigurable data path includes a reconfigurable branch metric calculation block. The reconfigurable data path also includes a reconfigurable add-compare-select and path metric calculation block. The reconfigurable data path is controlled using a programmable finite state machine. The programmable finite state machine executes a plurality of context-related instructions associated with the Viterbi algorithm. The system and method for channel equalization supports multiple standards using Viterbi algorithms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.