Array substrate and method of manufacturing the same
US8071406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2009 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Nov 17, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a substrate including a display area and a peripheral area surrounding the display area, a transistor layer formed in the display area of the substrate and electrically connected to a gate line and a data line, a color filter formed in a pixel region on the transistor layer, a first light blocking member disposed between adjacent color filters, a first transparent member formed on the first light blocking member to cover the first light blocking member, a first color pattern formed in a peripheral area of the substrate and including substantially the same material as the color filter, and a second transparent member including substantially the same material as the first transparent member. The second transparent member is disposed in the peripheral area of the substrate to cover the first color pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.