Isolation structures for preventing photons and carriers from reaching active areas and methods of formation

US8071455B2 · kind B2 · utility

Assignee

• Aptina Imaging Corporation · KY

Inventors

• Bryan G. Cole · Boise, US
• Troy Sorensen · Boise, US

Key dates

• Filing date: Apr 15, 2009
• Grant date: Dec 6, 2011
• Expiry date: Oct 8, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F30/221

Abstract

Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 μm into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.