Simultaneous sampling analog to digital converter
US8072360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Dec 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention is a novel scheme of performing an analog to digital conversion of simultaneous sampled analog inputs using multiple sample and hold circuits and a single successive approximation analog to digital converter (“SAR ADC”). Each of the analog inputs are stored on capacitors in the sample and hold circuits, and the sample and holds are sequentially connected to the capacitor DAC. After the digital conversion of the of the input signals stored on a sample and hold, the connected sample and hold is disconnected and the charge on the DAC is reset before the next sample and hold circuit is connected. The process is repeated until all analog inputs have been converted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.