Cryptographic system, method and multiplier
US8073892B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2005 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Jan 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5275
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In general, in one aspect, the disclosure describes a multiplier that includes a set of multiple multipliers configured in parallel where the set of multiple multipliers have access to a first operand and a second operand to multiply, the first operand having multiple segments and the second operand having multiple segments. The multiplier also includes logic to repeatedly supply a single segment of the second operand to each multiplier of the set of multiple multipliers and to supply multiple respective segments of the first operand to the respective ones of the set of multiple multipliers until each segment of the second operand has been supplied with each segment of the first operand. The logic shifts the output of different ones of the set of multiple multipliers based, at least in part, on the position of the respective segments within the first operand. The multiplier also includes an accumulator coupled to the logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.