Dynamic instruction and data updating architecture
US8074053B2 · kind B2 · utility
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12References
25Claims
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Key dates
| Filing date | Nov 15, 2006 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Jan 3, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory update engine provides flexible modification of data in memory. A processor may employ the update engine to update filter coefficients, special effects parameters, signal sample processing instructions, or any other instruction or data during processing. The update engine supports dynamic updating without requiring processor shutdown, thereby allowing the processor to seamlessly continue operation during a live performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.