Method and software tool for designing an integrated circuit
US8074191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2008 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Feb 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of designing an integrated circuit for use in an application having standards having a plurality of primitives, wherein each of the primitives has a corresponding response. The method includes generating a macros description of each of the primitives and the response corresponding to each of the primitives, generating a template relating to the response corresponding to each of the primitives, receiving information specifying a behavior of the integrated circuit in response to the primitives based on the template, and generating a hardware description language representation for the integrated circuit based on the macros description and the information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.