Method of fabricating semiconductor device
US8076202B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 15, 2010 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Mar 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.