Transistor and method for operating the same
US8076698B2 · kind B2 · utility
36Cited by
4References
5Claims
0Family size
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Key dates
| Filing date | Jun 27, 2006 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Jul 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/254
Abstract
In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.