TFT LCD array substrate wherein an air gap is formed between the insulating layer and the active layer and method of manufacturing thereof
US8077267B2 · kind B2 · utility
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2References
17Claims
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Key dates
| Filing date | May 23, 2008 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Aug 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/60
Abstract
Provided are a thin film transistor liquid crystal array substrate and a method of manufacturing the same. The thin film transistor liquid crystal display array substrate includes: a substrate, a gate scanning line and a signal scanning line formed on the substrate and intersecting each other, an insulating layer and an active layer formed between the gate scanning line and the signal scanning line, wherein an air gap is formed between the insulating layer and the active layer at the intersection of the gate scanning line and the signal scanning line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.