Failsoft system for multiple CPU system
US8078907B2 · kind B2 · utility
3Cited by
23References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2006 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Jul 25, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cpu-set type multiprocessor system allows a cpu of a cpu-set that has a hardware exception to disable itself and notify the system. The system assigns processes of the cpu-set that include the problem cpu to another cpu-set. The disabling of the problem cpu and transfer of the related processes to another cpu-set allows the system to failsoft so that other cpu-sets the multiprocessor system can continue to run and a recovery of the processes being run on the problem cpu-set occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.