Non-volatile semiconductor memory device
US8078940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2007 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Aug 31, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device comprises a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage. A likelihood calculator has a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a threshold value read out of the memory cell. An error correction unit executes error correction through iterative processing using the likelihood value obtained at the likelihood calculator. A likelihood calculator controller changes among the likelihood calculation algorithms in the likelihood calculator based on a certain value of the number of iterations in the iterative processing obtained from the error correction unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.