Semiconductor device, semiconductor package, and method for testing semiconductor device
US8080873B2 · kind B2 · utility
1Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2005 |
| Grant date | Dec 20, 2011 |
| Priority date | — |
| Expiry date | Jan 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device designed to facilitate testing. Superimposed first and second semiconductor chips each include a plurality of internal terminals, an external terminal, and a plurality of transistors. A plurality of wires connect the internal terminals, the transistors, and the external terminals of the first and second semiconductor chips in series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.