Serial data signal eye width estimator methods and apparatus
US8081723B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2008 |
| Grant date | Dec 20, 2011 |
| Priority date | — |
| Expiry date | Jun 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for determining at least part of the width of the eye of a high-speed serial data signal use clock and data recovery circuitry operating on that signal to produce a first clock signal having a first phase relationship to the data signal. The first clock signal is used to produce a second clock signal whose phase can be controllably shifted relative to the first phase. The second clock signal is used to sample the data signal with different amounts of phase shift, e.g., until error checking circuitry detects that data errors in the resulting sample exceed an acceptable threshold for such errors. The amount(s) of phase shift that caused exceeding the threshold can be used as a basis for a measurement of eye width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.