Dynamic programmable delay selection circuit and method
US8082463B2 · kind B2 · utility
0Cited by
12References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 2010 |
| Grant date | Dec 20, 2011 |
| Priority date | — |
| Expiry date | Oct 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00156
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A controller may include a measurement circuit configured to generate a proxy signal representing delay variations in the controller. The measurement circuit may also generate a measurement value from the proxy signal. A control circuit may be configured to convert the measurement value into a control value. A delay circuit may be adjusted by the control value to alter an amount of delay of a signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.