Transistor devices and methods of making
US8084329B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2010 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Jan 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
In an embodiment, a method of fabricating a transistor device comprises: providing a semiconductor topography comprising a gate conductor disposed above a semiconductor substrate between a pair of dielectric spacers; anisotropically etching exposed regions of the semiconductor substrate on opposite sides of the dielectric spacers to form recessed regions in the substrate; oxidizing exposed surfaces of the substrate in the recessed regions to form an oxide thereon; removing the oxide from bottoms of the recessed regions while retaining the oxide upon sidewalls of the recessed regions; and isotropically etching the substrate such that the recessed regions undercut the pair of dielectric spacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.