Reducing noise coupling in high speed digital systems
US8084692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2007 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Sep 29, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/1013
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus having reduced noise coupling includes a core layer having an upper and lower surface, the upper and lower surface each including a copper sheet layer, a pre-preg layer having an upper surface and a lower surface, the upper surface of the pre-preg layer coupled to the lower surface of the core layer, a core insulating layer having an upper surface and a lower surface, the upper surface of the core insulating layer coupled to the lower surface of the pre-preg layer, a return current reference layer disposed on the lower surface of the core insulator layer and high-speed signal traces disposed on the upper surface of the core insulating layer, each of the high speed signal traces disposed on a pedestal defined by a section of the pre-preg layer and the core insulating layer, each pedestal being separated by an air gap disposed between adjacent pedestals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.