Buck-boost converter with sample and hold circuit in current loop
US8085005B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 18, 2009 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Jul 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/1582
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In an average-current mode control type buck-boost PWM converter, a sample and hold circuit is inserted in the current loop to avoid problems associated with ripple of the average inductor current demand signal. The rippling average inductor current is generated by a differential transconductance amplifier having applied to its inputs an error signal and a signal corresponding to the instantaneous current through the inductor, where the output of the amplifier is filtered. The rippling average inductor current is sampled and held at the beginning of each switching cycle, prior to the average inductor current demand signal being compared to buck and boost sawtooth waveforms. By using the sample and hold circuit, the feedback loops are easier to stabilize, and the converter cannot switch modes during a switching cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.