Patent · US Active

Optimized buffer loading for packet header processing

US8085780B1 · kind B1 · utility

6Cited by

34References

17Claims

0Family size

Assignee

Juniper Networks, Inc. · US

Inventors

Raymond Marcelino Manese Lim · Los Altos Hills, US
Jeffrey G. Libby · Cupertino, US

Key dates

Filing date	Jan 27, 2010
Grant date	Dec 27, 2011
Priority date	—
Expiry date	Jan 27, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH04L49/602
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

A packet header processing engine includes a level 2 (L2) header generation unit and a level 3 (L3) header generation unit. The L2 and L3 header generation units are implemented in parallel with one another. The L2 generation unit writes L2 header information to a first buffer and the L3 generation unit writes L3 header information to a second buffer. When the L2 and L3 header generation units finish processing a packet, the packet may be unloaded from the first and second buffer while a new packet is simultaneously loaded to the packet header processing engine.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.