Amplitude monitor for high-speed signals
US8085880B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 2004 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Mar 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0037
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial communication system includes a receiver that incorporates an amplitude monitor, which may be used to set and maintain appropriate termination-resistance values and transmit pre-emphasis and receive equalization settings. The amplitude monitor can note the presence or absence of input signals, as is required by some communication standards, such as those that require support for “out-of-band” (OOB) signaling for e.g. rate negotiation. The amplitude monitor compares the input signal with a reference level in response to a sample clock. The sample clock is periodically phase shifted with respect to the incoming data so the amplitude monitor is sure to sample an incoming data eye at or near the peak amplitude over a selected sample period. The amplitude detector notes the detection of an input signal if the input signal surpasses the reference level for any sample phase. The amplitude monitor experiments with different sample-clock phases over a number of data symbols, but is capable of measuring amplitude fast enough to resolve amplitude-based signals used for rate negotiation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.